There are many digital communication systems that make use of Multi-Frequency Time Division Multiple Access techniques (MF-TDMA). These systems use frequency syntesizers for generating the channel frequencies that will be used to transmit the digital information.
As the present systems work at high rates, it becomes necessary to reduce the guard time between consecutive time slots in order to keep a high efficiency of the system, which means that in case of a change in the radio-frequency channel, the frequency synthesizer must switch its old frequency to the new one quickly, as it is necessary to make sure that the new frequency is already established when the next time slot of the MF-TDMA system starts.
There are many techniques for minimizing the switching time between channels.
Some of them are based on the use of a loop filter whose bandwidth varies, being larger at the beginning when the loop is totally unlocked, and getting narrower when the loop is getting locked, as indicated in the article "Phase loop design for TDMA Applications" by C. Ryan, published into the 1985 IEEE Military Communications Conference MILCOM'85, Vol. 2, pp. 320 to 323.
The main drawback of this type of techniques is that when it is necessary to reduce the switching time between channels, it is also necessary to increase the complexity of the loop filter which results in the synthesizer becoming more expensive and less reliable, increasing the possibility that the frequency synthesizer stability may be negatively affected.